At a time when we all carry smartphones that can stream high-definition movies into our hands, the romance of listening to old-school analog broadcast radio nevertheless endures. For some it’s a break from the cookies, contracts, and terms of service that lurk behind every online activity. For folks like me though, a big part of the charm is the thrill that comes from pulling in a signal from thousands of kilometers away—and doing it the time-honored way: with an understanding of atmospheric conditions, antennas, and electronics.
This pastime of using varied knowledge and skills to pull in very distant stations is called DXing. Today, digital signal processing makes it possible to put stupendously capable receiver electronics into an economical and very portable package, so there’s never been a better time to be a DXer. And among these high-performance electronics, there’s arguably no better example than the TEF6686 chip, introduced in 2013 by NXP Semiconductors and revised multiple times since then.
The chip has been very successful in car radios, in part because of its low cost and high audio fidelity, but especially because of its astoundingly high sensitivity and selectivity to radio signals. The TEF6686 can receive both FM and AM, and can be configured to accommodate the different bandwidths used by stations in different countries. It can also decode a broadcast station’s digital RDS (Radio Data System) feed, which when present contains continuously updated information such as the title of a song currently playing.
The chip’s extreme selectivity and sensitivity results from its adept use of software-defined-radio and digital-signal-processing (DSP) technologies to filter out adjacent frequencies. This enables reception of very weak signals that would otherwise be drowned out by nearby broadcasts. The chip has proven irresistible to radio enthusiasts, attracted by features of the chip that go far beyond what is needed by a car radio. It can receive not just the commercial broadcast bands, but also the shortwave and long-wave bands. The chip can also provide instantaneous signal-strength information.
The TEF6686 chip can be found in a handy module [top left] that provides electromagnetic shielding and a through-hole interface. An ESP32-based development board [top middle] controls the module and performs signal processing. An LCD screen displays the user interface, which is controlled using buttons and rotary controls [bottom left]. James Provost
As an active radio amateur (PE5PVB) in the Netherlands, I became intrigued by the enthusiastic reviews I started seeing of the TEF6686. During the COVID lockdown of 2020, I started designing a completely open-source tuner that would wring the highest possible performance out of the chip for FM DXers. My enthusiasm grew when I found TEF6686 tuner modules on AliExpress. These contain a TEF6686 chip in a DIY-friendly package, suitable for through-hole soldering (the TEF6686 itself is a surface-mounted chip), and with radio-frequency shielding to help minimize interference. These modules are cheap—they can generally be found for around US $25.
I soon settled on a configuration consisting of two printed circuit boards connected by ribbon cable. There’s a main board, which contains the TEF6686 module and the microcontroller, and a display board, with a small OLED display and the switches and encoders that control the radio. I evaluated various versions of Arduino-compatible microcontrollers, and found that most were all too slow and had insufficient flash memory.
The microcontroller needs a lot of flash because it must store not only all the firmware that operates the radio, which is sent to the TEF6686 after every boot up, but it also must store the different fonts for the display, various images, as well as a database of North American call signs and of Canadian provinces and U.S. states (this info, coupled with other capabilities, enables the user to immediately see the call sign and state where the transmitter they are receiving is located). Eventually I settled on a variant of the ESP32 module, that had the speed and memory capacity I needed, but that still could be programmed using the popular Arduino IDE.
In early 2021, I released on GitHub an initial version of the firmware and schematics for other DIYers. I also was in contact with a DIY Webshop in the Netherlands, Team AmateurRadioShop.nl, which still sells a kit of an earlier version of the radio. In the fall of 2021, I created a second version with a so-called human-machine interface (HMI) display from Nextion. This display has a built-in processor, so I could hand off more user-interface tasks from the ESP32. This sped up the radio considerably, and also opened up some new graphical possibilities. In this version I also added Wi-Fi, which permits connection to online resources such as XDR GTK, a user interface that allows for fine computer control of the radio tuner, and RDS Spy, which decodes the RDS data into usable information in real time. If you want to build this version yourself, you’ll have to have your own printed circuit boards made up. But Gerber files, a bill of materials, and construction tips are available on my Web site atwww.pe5pvb.nl. Soldering it together will take about 2 hours.
The display and controls are directly connected to the microcontroller using general-purpose input/output pins, while the TEF6686 receiver chip is controlled via commands sent over a serial I2C interface. The left and right channels are amplified and passed to standard RCA audio sockets.James Provost
For those who don’t feel like making a kit, there’s an option for you, too. Early in 2022, a Chinese hobbyist, Justin Peng, contacted me to say he had built a portable version out of my design. That summer, the first versions based on this design of his appeared on AliExpress. In the months after that, interest in my open-source project exploded, and the radio was adopted by FM DXers worldwide.
In 2023, I was contacted by a Czech hobbyist, Marek Farkaš, who invited me to a group he was establishing on the Discord social platform with other hobbyists devoted to working on and improving software for this radio. In this team we now have a graphic designer, some folks who are specialists in RDS, others who are very skilled programers, and a Chinese fellow who wrote a version suitable for use by hardware designers looking to make a radio for the AliExpress market. Together, we completely reviewed the code and added a smoother graphical design, more connectivity, selectable languages, and other improvements.
I am very grateful to this team for all their hard work to make this open-source radio perhaps the highest-performing radio of its kind, ever. I hope you’ll try it out, and even if you don’t spend your time hunting for distant stations, rediscover the joy of high-quality FM radio broadcasting!
This article appears in the December 2024 print issue as “The Ultimate SDR Receiver.”
Researchers have discovered malicious code circulating in the wild that hijacks the earliest stage boot process of Linux devices by exploiting a year-old firmware vulnerability when it remains unpatched on affected models.
The critical vulnerability is one of a constellation of exploitable flaws discovered last year and given the name LogoFAIL. These exploits are able to override an industry-standard defense known as Secure Boot and execute malicious firmware early in the boot process. Until now, there were no public indications that LogoFAIL exploits were circulating in the wild.
The discovery of code downloaded from an Internet-connected web server changes all that. While there are no indications the public exploit is actively being used, it is reliable and polished enough to be production-ready and could pose a threat in the real world in the coming weeks or months. Both the LogoFAIL vulnerabilities and the exploit found on-line were discovered by Binarly, a firm that helps customers identify and secure vulnerable firmware.
Ruzena Bajcsy is one of the founders of the modern field of robotics. With an education in electrical engineering in Slovakia, followed by a Ph.D. at Stanford, Bajcsy was the first woman to join the engineering faculty at the University of Pennsylvania. She was the first, she says, because “in those days, nice girls didn’t mess around with screwdrivers.” Bajcsy, now 91, spoke with IEEE Spectrum at the 40th anniversary celebration of the IEEE International Conference on Robotics and Automation, in Rotterdam, Netherlands.
Ruzena Bajcsy
Ruzena Bajcsy’s 50-plus years in robotics spanned time at Stanford, the University of Pennsylvania, the National Science Foundation, and the University of California, Berkeley. Bajcsy retired in 2021.
What was the robotics field like at the time of the first ICRA conference in 1984?
Ruzena Bajcsy: There was a lot of enthusiasm at that time—it was like a dream; we felt like we could do something dramatic. But this is typical, and when you move into a new area and you start to build there, you find that the problem is harder than you thought.
What makes robotics hard?
Bajcsy: Robotics was perhaps the first subject which really required an interdisciplinary approach. In the beginning of the 20th century, there was physics and chemistry and mathematics and biology and psychology, all with brick walls between them. The physicists were much more focused on measurement, and understanding how things interacted with each other. During the war, there was a select group of men who didn’t think that mortal people could do this. They were so full of themselves. I don’t know if you saw the Oppenheimer movie, but I knew some of those men—my husband was one of those physicists!
And how are roboticists different?
Bajcsy: We are engineers. For physicists, it’s the matter of discovery, done. We, on the other hand, in order to understand things, we have to build them. It takes time and effort, and frequently we are inhibited—when I started, there were no digital cameras, so I had to build one. I built a few other things like that in my career, not as a discovery, but as a necessity.
How can robotics be helpful?
Bajcsy: As an elderly person, I use this cane. But when I’m with my children, I hold their arms and it helps tremendously. In order to keep your balance, you are taking all the vectors of your torso and your legs so that you are stable. You and I together can create a configuration of our legs and body so that the sum is stable.
One very simple useful device for an older person would be to have a cane with several joints that can adjust depending on the way I move, to compensate for my movement. People are making progress in this area, because many people are living longer than before. There are all kinds of other places where the technology derived from robotics can help like this.
What are you most proud of?
Bajcsy: At this stage of my life, people are asking, and I’m asking, what is my legacy? And I tell you, my legacy is my students. They worked hard, but they felt they were appreciated, and there was a sense of camaraderie and support for each other. I didn’t do it consciously, but I guess it came from my motherly instincts. And I’m still in contact with many of them—I worry about their children, the usual grandma!
This article appears in the December 2024 issue as “5 Questions for Ruzena Bajcsy.”
Shrikanth Narayanan has spent his entire career making speech and language processing technologies more accessible.
The IEEE Fellow has developed machine intelligence and signal processing technologies to analyze human behavior including spoken language, facial expressions, and physiological indicators.
Shrikanth Narayanan
Employer:
University of Southern California
Title:
Professor of electrical engineering, computer science, linguistics, psychology, pediatrics, and otolaryngology
Member grade:
Fellow
Alma maters:
College of Engineering, Guindy (now Anna University), in Chennai, India; University of California, Los Angeles
Thanks to his work, medical professionals can better diagnose and monitor autism, depression, and other conditions.
Anyone using digital assistants has benefitted from Narayanan’s research in understanding and interpreting human emotions from speech. The assistants are now more intuitive, and they can better understand and respond to a user’s commands.
It’s also easier now to learn a new language thanks to tools he developed that provide feedback on how to pronounce words.
Narayanan is a professor of electrical engineering, computer science, linguistics, psychology, pediatrics, and otolaryngology at the University of Southern California, in Los Angeles. He also heads USC’s Signal Analysis and Interpretation Laboratory and holds several other academic positions within the university. He is a visiting faculty researcher at Google DeepMind in Los Angeles.
“I am so touched and honored,” he says about getting the award. “I started my career at Bell Labs, and James Flanagan was a legendary researcher in speech and audio there. Many people who have received this award have been my heroes in the field—who I look up to. Their work has inspired me profoundly.”
An early fascination with how the human body functions
Growing up in Chennai, India, Narayanan wanted to be a physician because he was fascinated with how the body works. He applied and was accepted into medical school at the age of 17, but his career plans changed before he even stepped into a classroom.
Narayanan’s father was a chemist, and his uncle was an electrical engineer. After several discussions, his family persuaded him to switch to engineering even at the “supportive protest” of his uncle who was an engineer, he says.
“At the time, electrical engineering was touted as the most foundational field of science,” he says. “I didn’t know much about it, but it soon became clear to me that I could start matching how signal processing systems work to conceptualize how the human body functions. That made me this sort of engineer who is very human-focused right from the beginning. I look at people from an engineering angle.”
He earned a bachelor’s degree in EE in 1988 from the College of Engineering, Guindy, (now part of Anna University, in Chennai). Narayanan went on to earn his master’s and doctoral degrees in EE in 1990 and 1995, from the University of California, Los Angeles.
He started his career as a research scientist in 1995 at AT&T Bell Labs (now Nokia Bell Labs) in Murray Hill, N.J. While working on speech and language processing technologies, he noticed that the applications being developed were only for healthy adults, so he and other researchers decided to focus on ones for children.
“When we started working on technologies for children, we immediately found fundamental challenges because of this dynamic trajectory of how their speech and language changes,” he explains. “As children are growing, they’re developing not only physically and physiologically but also socially.”
The researchers first had to create a foundation based on speech science for the changes to be studied objectively and quantitatively, he says.
“Speech and language result from a complex orchestration of various processes that happen in the brain and the neural and motoric systems,” he says.
“My greatest joy is working with my students in my lab and learning from them, more than being a teacher or advisor. It’s amazing that I get to learn new things every day.”
To study the processes in a systematic way, the researchers used sensors and imaging to measure changes in speech and language skills. After collecting data in the form of signals, the researchers applied signal processing techniques to extract meaningful information.
Narayanan concluded that their method could be used for children who have developmental conditions such as autism spectrum disorder, language delays, and similar disorders.
They invented behavioral signal processing (BSP) technology, which analyzes and interprets speech and language in social situations. Narayanan says the technology is useful for children with autism who typically have a difficult time with social interactions. The researchers also developed computational models to detect and interpret emotional cues from autistic children’s speech and facial expressions.
Another tool they created monitors the progress of the communication abilities of children who are not developing language skills at the expected age.
The researchers’ early work in understanding and interpreting human emotions from speech has inspired features used in virtual assistants such as Alexa and Siri to sound more natural and recognize a user’s emotions. BSP technology helps the devices recognize not only what users say but also how they say it.
The researchers’ work in acoustic modeling, language modeling, and integrating contextual information enabled digital assistants to identify speech more accurately.
Tech to improve mental health
Narayanan left Bell Labs in 2000 to join the USC faculty. He always wanted to mentor students and work with people from different disciplines, he says, so when he was offered a teaching position in California—a place he loves—he decided to give it a shot.
“My greatest joy is working with my students in my lab and learning from them, more than being a teacher or advisor,” he says. “It’s amazing that I get to learn new things every day.”
Throughout his nearly 25 years at USC, Narayanan has continued to develop speech and language processing applications for health care. He uses technologies such as BSP to create methods to better understand mental health.
“Bringing engineering tools to support research into mental health has been a big area,” he says. “I’m very committed to that field.”
Diagnosing and treating mental health conditions often involves interacting with patients using speech and language. In psychotherapy, for example, a mental health professional talks with the patient to identify troubling thoughts, emotions, and behaviors and to help address them.
Psychotherapy research and clinical practice tend to use manual methods to collect and evaluate performance and efficacy data, Narayanan says, but that is not scalable and can lead to inaccuracy. The answers might not actually reflect how the patient feels, he says.
Narayanan and his colleagues invented a way to collect data through speech and language-based biomarkers to characterize therapy quality and outcomes. They also designed objective measures to detect and monitor a person’s speech patterns for signs of depression and anxiety.
Narayanan holds 19 U.S. patents and has helped to found several startups to commercialize his technologies.
Overseeing USC’s grand research plans
In February he took on a new role that utilizes his multidisciplinary background: USC appointed him as vice president for its presidential initiatives, a newly created position. He coordinates and expands the reach of the university’s research initiatives in computing, health, and sustainability, things the university refers to as moon shots. Notably the university has invested more than US $1 billion in its Frontiers of Computing initiative.
“The university and its president have this big strategic vision of thinking about grand problems, like the future of health, the future of computing, and sustainability of the planet,” Narayanan says. “They wanted a researcher and a scholar who works across disciplines. They want me to connect people and ideas to launch these big initiatives that have a global footprint.”
“Advances are taking place at an astonishing rate in the evolving fields encompassed by our moon shots,” Carol Folt, the university’s president, said in an announcement about the appointment. “This role was created to focus not only on implementing but also continually broadening, amplifying, and weaving our moon shots together so USC remains at the forefront of discovery and innovation. Professor Narayanan is the perfect choice for this role.”
IEEE: A big family
At the encouragement of one of his undergraduate professors, Narayanan joined IEEE in his senior year.
“I realized IEEE is a home to learn, to share, and to constantly grow,” Narayanan says. “IEEE provides that for us. It’s a platform to situate your work in your field, and in the broader context of society and humanity. And, of course, you make a lot of lifelong friends, and you give back as a volunteer.”
And give back he has. A member of the IEEE Computer and IEEE Signal Processing societies, he was the latter’s first vice president of education.
He has been on the editorial boards of both societies’ publications and has served as editor in chief for their journals and transactions. He also held leadership roles in organizing the societies’ conferences and workshops.
Over the past decade, a new class of infections has threatened Windows users. By infecting the firmware that runs immediately before the operating system loads, these UEFI bootkits continue to run even when the hard drive is replaced or reformatted. Now the same type of chip-dwelling malware has been found in the wild for backdooring Linux machines.
Researchers at security firm ESET said Wednesday that Bootkitty—the name unknown threat actors gave to their Linux bootkit—was uploaded to VirusTotal earlier this month. Compared to its Windows cousins, Bootkitty is still relatively rudimentary, containing imperfections in key under-the-hood functionality and lacking the means to infect all Linux distributions other than Ubuntu. That has led the company researchers to suspect the new bootkit is likely a proof-of-concept release. To date, ESET has found no evidence of actual infections in the wild.
The ASCII logo that Bootkitty is capable of rendering. Credit: ESET
Be prepared
Still, Bootkitty suggests threat actors may be actively developing a Linux version of the same sort of unkillable bootkit that previously was found only targeting Windows machines.
In 1970, Bill Harding envisioned a fully automated wafer-fabrication line that would produce integrated circuits in less than one day. Not only was such a goal gutsy 54 years ago, it would be bold even in today’s billion-dollar fabs, where the fabrication time of an advanced IC is measured in weeks, not days. Back then, ICs, such as random-access memory chips, were typically produced in a monthlong stop-and-go march through dozens of manual work stations.
At the time, Harding was the manager of IBM’s Manufacturing Research group, in East Fishkill, N.Y. The project he would lead to make his vision a reality, all but unknown today, was called Project SWIFT. To achieve such an amazingly short turnaround time required a level of automation that could only be accomplished by a paradigm shift in the design of integrated-circuit manufacturing lines. Harding and his team accomplished it, achieving advances that would eventually be reflected throughout the global semiconductor industry. Many of SWIFT’s groundbreaking innovations are now commonplace in today’s highly automated chip fabrication plants, but SWIFT’s incredibly short turnaround time has never been equaled.
SWIFT averaged 5 hours to complete each layer of its fabrication process, while the fastest modern fabs take 19 hours per processing layer, and the industry average is 36 hours. Although today’s integrated circuits are built with many more layers, on larger wafers the size of small pizzas, and the processing is more complex, those factors do not altogether close the gap. Harding’s automated manufacturing line was really, truly, swift.
A Semiconductor Manufacturing Manifesto
I encountered Harding for the first time in 1962, and hoped it would be the last. IBM was gearing up to produce its first completely solid-state computer, the System/360. It was a somewhat rocky encounter. “What the hell good is that?” he bellowed at me as I demonstrated how tiny, unpackaged semiconductor dice could be automatically handled in bulk for testing and sorting.
Author Jesse Aronstein [at far right, in top photo] took a break from managing the equipment group of Project SWIFT to play French horn one evening a week with the Southern Dutchess Pops Orchestra. Another key manager, Walter J. “Wally” Kleinfelder [bottom left], standing at right, headed the process group of Project SWIFT. William E. “Bill” Harding [bottom right], seen here in 1973, was a brusque WW II combat veteran and creative innovator. He conceived and directed IBM’s Project SWIFT, which succeeded in fabricating integrated circuits in one day.Clockwise from top: IBM/Computer History Museum; IBM (2)
William E. (“Bill”) Harding was an innovative thinker and inventor. He had been developing semiconductors and their manufacturing technology at IBM for three years when the company’s new Components Division was formed in 1961. Harding became a midlevel manager in the new division, responsible for developing and producing the equipment required to manufacture the System/360’s solid-state devices and circuit modules.
He was rough around the edges for an IBM manager. But perhaps it was to be expected of someone who had grown up in Brooklyn, N.Y., and was wounded three times in combat in World War II while serving in General George S. Patton’s Third Army. After the war, Harding earned bachelor’s and master’s degrees in mathematics and physics and became a member of IEEE.
I joined IBM in 1961, coming from rocket-engine development at General Electric. Like most engineers at the time, I knew nothing about semiconductor manufacturing. Five years prior, I had attended a vacuum-tube electronics course in which the professor described the transistor as “a laboratory curiosity, which may or may not ever amount to anything.”
Project SWIFT occupied a small space, shown here in yellow, in building 310 at IBM’s sprawling East Fishkill semiconductor facility. IBM
Harding’s rough and crude manner surfaced every time I crossed paths with him. If he ever went to IBM “charm school” (management training), there was no discernible evidence of it. Nevertheless, he succeeded in his mission. By 1964, solid-state logic modules for System/360s were flowing from the Components Division’s new facility on a former farm in East Fishkill.
In July 1970, I returned to IBM after three years of graduate study. I was a first-level manager for four years prior to that educational break, and did not want another management job. I wanted a purely technical career, and I joined East Fishkill’s Manufacturing Research (MR) group hoping to get one.
Harding and I then crossed paths again. In mid-August of 1970, he became MR’s top manager. Prior to that, he spent a year developing an IBM corporate strategy for the future manufacturing and use of very-large-scale integrated (VLSI) circuits. He was given command of MR to demonstrate the viability of his manufacturing concepts.
An assembly of MR personnel was convened to announce the management change. After being introduced, Harding described his view of future VLSI applications and manufacturing. These were his key points:
VLSI circuits would be based on field-effect transistor technology (at the time, bipolar-junction transistors were dominant);
Defect-free high yields would be paramount;
Manufacturing would be fully automated;
Best results would accrue from processing one wafer at a time;
Short turnaround times would confer important benefits;
Volume would scale up by replicating successful production lines.
After the educational lecture, Harding changed from professor to commander, General Patton–style. MR’s sole mission was to demonstrate Harding’s ideas, and ongoing projects not aligned with that goal would be transferred elsewhere within IBM or abandoned. MR would prove that an automated system could be constructed to process about 100 wafers a day, one at a time, with high yield and a one-day turnaround time.
What? Did I hear that right? One-day turnaround from bare wafer to finished circuits was what we would now call a moon shot. Remember, at the time, it typically took more than a month. Did he really mean it?
Harding knew that it was theoretically possible, and he was determined to achieve it. He declared that IBM would have a substantial competitive advantage if prototype experimental IC designs could be produced in a day, instead of months. He wanted the circuit designer to have testable circuits the day after submitting the digital description to the production line.
One-day turnaround from bare wafer to finished circuits was what we would now call a moon shot.
Harding immediately organized an equipment group and a process group within MR, naming me to manage the equipment group. I did not want to be a manager again. Now, reluctantly, I was a second-level manager, responsible for developing all the processing and wafer-handling equipment for a yet-to-be-defined manufacturing line that I had barely started to visualize. My dream research job had lasted little more than a month.
Walter J. (“Wally”) Kleinfelder transferred into MR to manage the process group. They would select the product to manufacture and define the process by which it would be made—the detailed sequence of chemical, thermal, and lithographic steps required to take a blank silicon wafer and build integrated circuits on its surface at high yield.
Kleinfelder selected a random-access memory chip, the IBM RAM II, for our demonstration. This product was being produced on-site at East Fishkill, so we would have everything we needed to build it and evaluate our results relative to those of the existing nonautomated manufacturing line.
IBM’s SWIFT Pilot Wafer Fab Had a Monorail “Taxi”
Integrated-circuit manufacturing involves first creating the transistors and other components in their proper places on the silicon wafer surface, and then wiring them together by adding a thin film of aluminum selectively etched to create the required wiring pattern. That thin film of conductor is known as the wiring, or metallization, layer.
IC manufacturing uses photolithography to create the many layers, each with a distinctive pattern, needed to fabricate an IC. These include the metal wiring layers, of which there can be more than a dozen for an advanced chip today. For these steps, the metal layer on the wafer is coated with a light-sensitive photoresist material, after which an image of the pattern is exposed on to it. The areas where conductors will be formed are blocked from the light. When the image is developed, the resist is removed from the pattern areas that were exposed, enabling these areas to be etched by an acid. The rest of the surface remains protected by the acid-proof resist. After etching is completed, the remaining protective resist is removed, leaving just the wiring layer in the required pattern.
Project SWIFT at a Glance
The Project SWIFT fabrication line was based on five “sectors.” Each was an enclosed automobile-size machine that performed all of the process steps between lithographic mask-pattern exposures. Other than sectors one and five, wafers entered a sector with pattern-exposed photoresist ready for development and exited the sector with fresh photoresist ready for the next pattern exposure. The taxi conveyed individual wafers from a sector to the lithographic-pattern expose station, and subsequently to the next sector in the sequence.
The SWIFT fabrication line was controlled by a three-level hierarchy of control systems. At the highest level, an IBM 1800 computer managed the line overall. It communicated with controllers for each of the five processing sectors, within which were processing- and wafer-handling subsectors, some with their own controllers.
The IC process also uses lithography to create transistors and other components on the silicon wafer. Here, openings are etched in insulating layers through which tiny amounts of specific impurities can be infused into the exposed spots of pure silicon to change the electrical properties. Producing the RAM-II ICs required four separate lithographic operations using four different patterns: three for creating the transistors and other components, and one to create the metal wiring layer. The four patterns had to be exactly aligned with one another to successfully create the chips.
Lithography is only part of the IC manufacturing process, however. In the existing production line, it took many weeks to process a RAM-II wafer. But the raw process time—the time a wafer spent actually being worked on at various thermal, lithographic, chemical, and deposition stations—was less than 48 hours. Most of a wafer’s time was spent waiting to undergo the next process step. And some steps, chemical cleaning in particular, could be eliminated if wafers progressed quickly from one step to the next.
It was the responsibility of Kleinfelder’s group to determine which steps could be eliminated and which could be accelerated. The resulting raw process time was less than 15 hours. It then fell to Maung Htoo, my manager of chemical-equipment development, to test the proposed process. His people hustled 1.25-inch-diameter wafers through a “pots and pans” lab setup to evaluate and refine it. The abbreviated procedure successfully produced working circuits in about 15 hours, as anticipated.
The architecture of an automated system materialized. It was initially envisioned as a series of linked machines, each performing one step of the process, like an automobile assembly line. But equipment downtime for preventative maintenance and repair of breakdowns had to be accommodated. This was achieved by the insertion of short-term storage “buffers” that would temporarily store wafers at selected points in the process chain when necessary.
This process chain concept was further disrupted by considerations related to lithographic-pattern imaging. Exposure of the photoresist on wafers was commonly accomplished at the time by a process analogous to photographic contact printing. The lithographic mask, through which light shone when exposing the photoresist, was the equivalent of a photographic negative. Any defect or particle on the mask would result in a corresponding defect on a chip, at the same location, wafer after wafer.
The East Fishkill lithography group had developed a noncontact 10:1 reduction step-and-repeat image projector. Think of it as a sort of photographic slide projector that produced a shrunken image containing the pattern for a single layer on a chip. It then “stepped” across the wafer, exposing one chip location at a time. Relative to contact masking, the stepper promised lower sensitivity to particulate contamination, because the size of the shadow of any stray particle would be reduced by 10:1. Other advantages included higher optical resolution and longer mask life.
Because it was slow, though, multiple steppers would be needed to meet the throughput target. Achieving the best pattern alignment on each wafer for multiple pattern exposures required that a wafer be routed back to the same stepper for exposure of each layer in the process chain. That would cancel the effect of image distortions introduced by slight variations from one machine to another. Building the RAM-II circuits then required that a wafer make four separate trips to its assigned stepper. That divided the linear sequence into five sectors. A monorail “taxi” would take a wafer from one processing sector to its assigned stepper, and return later to take it to its next sector.
Each of the five sectors was envisioned to be an enclosure containing all of the automated wafer-processing and handling equipment required to accomplish that segment of the process chain. The sector enclosures and the taxi would be designed to provide a clean-room-quality local environment for the wafers. Within a sector enclosure, typically, a wafer would pass directly from a wet-chemistry module to miniature furnaces to a photoresist application module, and, finally, to the taxi pickup port. Inside the wet-chemistry module, for example, the wafer would undergo cleaning, development of the photoresist and its removal, and etching, among other procedures.
Control of the entire line was to be accomplished at three levels. Overall production-line management, recordkeeping, taxi logistics, and process monitoring would be handled by a central computer-based system. Dedicated controllers, one for each sector, would manage wafer logistics within the sector and feed wafer traffic and processing data to the central system. The individual processing and wafer-handling modules inside each sector enclosure would have their own specialized controls, as needed, for independent setup and maintenance.
Finally configured, our automated demonstration line for the RAM-II chips would consist of five sectors, a taxi, and a lithographic-pattern imaging center, all managed by computer. Six months after Harding took command, MR started to design and build the actual system.
The Brash Middle Manager Found Inspiration in Literature
Harding made frequent trips to IBM’s headquarters, in Armonk, N.Y., to report progress, request resources, rebut challenges, and convince the top brass that the money being spent was a good investment in the future. It was a tough mission. His lengthy weekly staff meetings often reflected the pressure he was under. He lectured at length on things he knew we knew, told allegorical stories, and spun analogies.
At the time, I did not realize that he was using his staff meetings to develop and refine ideas for the presentations at Armonk. He was noting our reactions and adjusting his presentation ideas accordingly. His presentations to the top brass were effective. For the duration of the project, spanning about three years, MR had all the funding and support it needed to develop, design, build, and operate the entire system.
At one staff meeting, Harding read aloud Heywood Broun’s short story “ The 51st Dragon,” to emphasize the power of a name or slogan to motivate people to achieve the impossible. His point, of course, was that we needed a really good name for the project. “SWIFT” was eventually chosen. Harding always insisted that it was not an acronym, but nevertheless people figured it was shorthand for “Semiconductor Wafer Integrated Factory Technology.”
SWIFT’s incredibly short turnaround time has never been equaled.
SWIFT’s processing and wafer-handling equipment was custom designed entirely within IBM’s Components Division. The primary design objectives were to process wafers automatically, consistently, and uniformly and keep them clean and undamaged. Wafer-handling experiments sorted out the cleanest and gentlest techniques. Handling equipment was designed to support the wafer rather than grip it. A novel wafer handler that used a flow of air above the wafer to lift it, without physical contact, was successfully incorporated for some of the wafer-transport moves.
There was one exception to the “clean and gentle” design of SWIFT’s handling apparatus. Management at the Components Division’s Burlington, Vt., site pressured Harding to use “air-track” wafer-transport equipment that they had developed. This equipment used airflow to lift and move wafers, much like a puck in a game of air hockey. Harding needed Burlington’s continued support, so he decreed that some air-track equipment be used in SWIFT. And it was, even though wafer-contamination and reliability questions were unresolved.
Another top-down decree explains why SWIFT ended up with two different types of sector control systems—the antithesis of good design for maintainability. A custom controller had been designed, and five units were being built (one for each sector), when HQ required that we incorporate the newly announced IBM System/7, which had been developed specifically for factory-equipment and process-control applications. After all, if IBM itself didn’t use the computer in its own advanced production line, potential customers would wonder “why not?” But if SWIFT used a System/7 and the project proved to be successful, it would help sell System/7s. And so for the five sectors, SWIFT ended up with four custom controllers and one System/7. Both types worked well.
Equipment reliability was SWIFT’s Achilles’ heel. To help achieve high reliability and ease of maintenance, certain mechanisms and controls were standardized for use throughout the system, and they were chosen for reliability and simplicity rather than novelty or elegance. For example, a person observing the system in operation would notice that many motions were accomplished in discrete smooth steps rather than a single traverse. Underlying that peculiarity was the extensive use of the simple, robust, and reliable Geneva drive, originally developed centuries ago for clocks, but now adapted for linear and rotary motions that had to be smooth and precisely locked in at the end points. Each easily controlled turn of the Geneva drive’s input shaft made one step. Long traverses required multiple turns of the shaft, resulting in the odd-looking motions.
Inside a sector’s enclosed chamber, a wafer went through a series of entirely automated processing steps. Two of the early concept sketches are represented here. The wafers came into the upper chamber with a pattern exposed onto the resist and underwent a series of processing steps that included development, hardening, etching, and others, as indicated.
Another simplification involved spinning the wafers to centrifugally spread liquid photoresist that was dropped onto the center of the wafer. In existing lines, “wrong spin speed” was frequently cited as the cause of resist-related wafer-processing rejects. Spin speed was eliminated as a variable by driving SWIFT’s spinners with synchronous AC motors locked to 3,600 rpm by their 60-hertz AC power source, just as phonograph turntables are driven. No speed controllers would be required. The desired photoresist film thickness would be achieved by adjusting the remaining variables—temperature, viscosity, and/or spin time. In the end, system reliability was improved by the elimination of four separate speed controllers.
As SWIFT progressed from blue-sky concept to actual hardware implementation, Harding adjusted MR’s organization and gained the cooperation of supporting groups. He saw to it that his people had the resources to do the job and could focus on the project. I came to admire his organizational skills and his ability to single out and recruit top-notch talent from within the company.
Harding established a group to develop SWIFT’s master control system, which monitored the progress on each and every wafer as it moved through the sectors. This Execution Control System (ECS) was based on an IBM 1800. Each wafer had a serial number and was tracked at every step through the line. The ECS stored and monitored each wafer’s processing parameters, detecting and reacting quickly to out-of-spec situations. Its punch cards and tape cartridges seem quaint by today’s measure, but it was a major advance in production control and monitoring for a wafer line.
He also transferred an entire instrumentation department, managed by Sam Campbell, from IBM Endicott to East Fishkill. Campbell’s department subsequently developed groundbreaking methods for real-time, in-situ process control for SWIFT.
A Short Life but an Enduring Legacy in Semiconductor Manufacturing
Mockups of furnaces and chemical processors were built and tested. Robert J. Straub’s department in East Fishkill’s Manufacturing Engineering group designed and built the sectors and the processing equipment modules within them. Harding brought in Bevan P.F. Wu to manage the installation, debugging, and operation of the line. As equipment and facilities coalesced in SWIFT’s dedicated 4,000-square-foot space, Rolf H. Brunner, who had managed a good portion of the sector designs along with development of the vacuum metal-deposition equipment, took responsibility under Wu for equipment installation, startup, and debugging.
Only one operation in the entire process was not fully automated. Alignment of the wafer for exposing the pattern on the photoresist still depended on a well-trained operator. In its final form, SWIFT had both a 10:1 optical stepper and also a 1:1 contact-mask machine, but as it happened, most of the chips produced were with the 1:1 machine, because the throughput was higher that way.
By the end of 1973, IBM HQ was already convinced that full automation of wafer processing could succeed. So much so that this goal was adopted as a primary objective for a new wafer-processing line to produce the circuits for IBM’s next-generation computer, the “FS” ( Future System). The proposed new line was dubbed “FMS” (Future Manufacturing System), and SWIFT was renamed “FMS Feasibility Line.”
Bevan Wu successfully managed the line’s completion, test runs, personnel training, and refinements of equipment, process, and procedures. He brought the line to the point of being qualified to produce circuits for IBM products. The system made five continuous-operation runs between mid-1974 and early 1975. Between runs, his group analyzed results and implemented improvements. The longest continuous run spanned 12 days. Wafer throughput averaged 58 wafers per day, 83 percent of its designed maximum. Average turnaround time from bare-wafer input to testable-circuits output was about 20 hours. The raw process time was 14 hours. The yield ultimately equaled the best ever achieved by East Fishkill’s conventional RAM-II production line.
A total of 135 technicians, engineers, and managers from IBM locations worldwide were trained on the operation of the system. They produced 600 product-quality wafers with 17,000 RAM-II FET memory chips.
But like his WWII commander, General Patton, Harding was bypassed to lead “the big show”—in Harding’s case, the creation of the new FMS automated line. Leaving the management career ladder behind, he was promoted to IBM Fellow, the highest nonmanagement level in the company.
The FMS Feasibility Line, originally SWIFT, made its last continuous run in early 1975. It had accomplished its objectives. Its people were now needed to help create the FMS line to produce FS computers. But later in 1975, the FS project was canceled, and FMS became superfluous. A portion of the equipment destined for FMS became East Fishkill’s QTAT (Quick Turn Around Time) line, a groundbreaking IBM showpiece that is better remembered than its obscure predecessor, Project SWIFT.
Although SWIFT’s life was short, and it was never in the limelight, its many innovations are clearly visible in today’s semiconductor fabs. Like SWIFT, these fabs are highly automated and computer controlled; have a central transport system and “Bernoulli” handlers, which exploit the flow of air to lift wafers without making physical contact; apply resist immediately after oxide or metal film formation; use steppers for lithographic pattern exposure; and employ real-time process control. All of these were groundbreaking features of Project SWIFT 50 years ago.
The experience of working under Harding on SWIFT for three years was, for me, transformative. What had started with trepidation ended with admiration. I have come to consider Bill Harding a true genius, in his own way. Spurred on and supported by his unique management style, a small group of dedicated people achieved far more than anyone initially envisioned. More than even we ourselves thought possible.
We think of the first achievers in an industry as the “fathers” of the modern embodiment of their inventions. Edison, Bell, Ford, and the Wright brothers, are commonly spoken of this way. In that sense, William E. Harding is clearly the father of the modern, automated, billion-dollar fab.
U.S. presidential administrations tend to have big impacts on tech around the world. So it should be taken as a given that when Donald Trump returns to the White House in January, his second administration will do the same. Perhaps more than usual, even, as he staffs his cabinet with people closely linked to the Heritage Foundation, the Washington, D.C.-based conservative think tank behind the controversial 900-page Mandate for Leadership (also known as Project 2025). The incoming administration will affect far more than technology and engineering, of course, but here at IEEE Spectrum, we’ve dug into how Trump’s second term is likely to impact those sectors.
Read on to find out more, or click to navigate to a specific topic. This post will be updated as more information comes in.
During Trump’s campaign, he vowed to rescind President Joe Biden’s 2023 executive order on AI, saying in his platform that it “hinders AI Innovation, and imposes Radical Leftwing ideas on the development of this technology.” Experts expect him to follow through on that promise, potentially killing momentum on many regulatory fronts, such as dealing with AI-generated misinformation and protecting people from algorithmic discrimination.
However, some of the executive order’s work has already been done; rescinding it wouldn’t unwrite reports or roll back decisions made by various cabinet secretaries, such as the Commerce secretary’s establishment of an AI Safety Institute. While Trump could order his new Commerce secretary to shut down the institute, some experts think it has enough bipartisan support to survive. “It develops standards and processes that promote trust and safety—that’s important for corporate users of AI systems, not just for the public,” says Doug Calidas, senior vice president of government affairs for the advocacy group Americans for Responsible Innovation.
As for new initiatives, Trump is expected to encourage the use of AI for national security. It’s also likely that, in the name of keeping ahead of China, he’ll expand export restrictions relating to AI technology. Currently, U.S. semiconductor companies can’t sell their most advanced chips to Chinese firms, but that rule contains a gaping loophole: Chinese companies need only sign up for U.S.-based cloud computing services to get their computations done on state-of-the-art hardware. Trump may close this loophole with restrictions on Chinese companies’ use of cloud computing. He could even expand export controls to restrict Chinese firms’ access to foundation models’ weights—the numerical parameters that define how a machine learning model does its job. —Eliza Strickland
Trump plans to implement hefty tariffs on imported goods, including a 60 percent tariff on goods from China, 25 percent on those from Canada and Mexico, and a blanket 10 or 20 percent tariff on all other imports. He’s pledged to do this on day 1 of his administration, and once implemented, these tariffs would hike prices on many consumer electronics. According to a report published by the Consumer Technology Association in late October, the tariffs could induce a 45 percent increase in the consumer price of laptops and tablets, as well as a 40 percent increase for video game consoles, 31 percent for monitors, and 26 percent for smartphones. Collectively, U.S. purchasing power for consumer technology could drop by US $90 billion annually, the report projects. Tariffs imposed during the first Trump administration have continued under Biden.
Meanwhile, the Trump Administration may take a less aggressive stance on regulating Big Tech. Under Biden, the Federal Trade Commission has sued Amazon for maintaining monopoly power and Meta for antitrust violations, and worked to block mergers and acquisitions by Big Tech companies. Trump is expected to replace the current FTC chair Lina Khan, though it remains unclear how much the new administration—which bills itself as anti-regulation—will affect the scrutiny Big Tech is facing. Executives from major companies including Amazon, Alphabet, Apple, Meta, Microsoft, OpenAI, Intel, and Qualcomm congratulated Trump on his election on social media, primarily X. (The CTA also issued congratulations.) —Gwendolyn Rak
On 6 November, the day the election was called for Trump, Bitcoin jumped 9.5 percent, closing at over US $75,000—a sign that the cryptocurrency world expects to boom under the next regime. Donald Trump marketed himself as a pro-crypto candidate, vowing to turn America into the “crypto capital of the planet” at a Bitcoin conference in July. If he follows through on his promises, Trump could create a national bitcoin reserve by holding on to bitcoin seized by the U.S. government. Trump also promised to remove Gary Gensler, the chair of the Securities and Exchanges Commission, who has pushed to regulate most cryptocurrencies as securities (like stocks and bonds), with more government scrutiny.
While it may not be within Trump’s power to remove him, Gensler is likely to resign when a new administration starts. It is within Trump’s power to select the new SEC chair, who will likely be much more lenient on cryptocurrencies. The evidence lies in Trump’s pro-crypto cabinet nominations: Howard Lutnick as Commerce Secretary, whose finance company oversees the assets of the Tether stablecoin; Robert F. Kennedy Jr. as the Secretary of Health and Human Services, who has said in a post that “Bitcoin is the currency of freedom”; and Tulsi Gabbard for the Director of National Intelligence, who had holdings in two cryptocurrencies back in 2018. As Trump put it at that Bitcoin conference, “the rules will be written by people who love your industry, not hate your industry.” —Kohava Mendelsohn
Trump’s plans for the energy sector focus on establishing U.S. “energy dominance,” mainly by boosting domestic oil and gas production, and deregulating those sectors. To that end, he has selected oil services executive Chris Wright to lead the U.S. Department of Energy. “Starting on day 1, I will approve new drilling, new pipelines, new refineries, new power plants, new reactors, and we will slash the red tape,” Trump said in a campaign speech in Michigan in August.
The first time Trump ran for president, he vowed to preserve the coal industry, but this time around, he rarely mentioned it. Coal-fired electricity generation has steadily declined since 2008, despite Trump’s first-term appointment of a former coal lobbyist to lead the Environmental Protection Agency. For his next EPA head, Trump has nominated former New York Representative Lee Zeldin—a play expected to be central to Trump’s campaign pledges for swift deregulation. —Emily Waltz
The incoming administration hasn’t laid out too many specifics about transportation yet, but Project 2025 has lots to say on the subject. It recommends the elimination of federal transit funding, including programs administered by the Federal Transit Administration (FTA). This would severely impact local transit systems—for instance, the Metropolitan Transportation Authority in New York City could lose nearly 20 percent of its capital funding, potentially leading to fare hikes, service cuts, and project delays. Kevin DeGood, Director of Infrastructure Policy at the Center for American Progress, warns that “taking away capital or operational subsidies to transit providers would very quickly begin to result in systems breaking down and becoming unreliable.” DeGood also highlights the risk to the FTA’s Capital Investment Grants, which fund transit expansion projects such as rail and bus rapid transit. Without this support, transit systems would struggle to meet the needs of a growing population.
Project 2025 also proposes spinning off certain Federal Aviation Administration functions into a government-sponsored corporation. DeGood acknowledges that privatization can be effective if well-structured, and he cautions against assuming that privatization inherently leads to weaker oversight. “It’s wrong to assume that government control means strong oversight and privatization means lax oversight,” he says.
Project 2025’s deregulatory agenda also includes rescinding federal fuel-economy standards and halting initiatives like Vision Zero, which aims to reduce traffic fatalities. Additionally, funding for programs designed to connect underserved communities to jobs and services would be cut. Critics, including researchers from Berkeley Law, argue that these measures prioritize cost-cutting over long-term resilience.
A recent firmware pushed to QNAP network attached storage (NAS) devices left a number of owners unable to access their storage systems. The company has pulled back the firmware and issued a fixed version, but the company's response has left some users feeling less confident in the boxes into which they put all their digital stuff.
As seen on a QNAP community thread, and as announced by QNAP itself, the QNAP operating system, QTS, received update 5.2.2.2950, build 20241114, at some point around November 19. After QNAP "received feedbacks from some users reporting issues with device functionality after installation," the firm says it withdrew it, "conducted a comprehensive investigation," and re-released a fixed version "within 24 hours."
The community thread sees many more users of different systems having problems than the shortlist ("limited models of TS-x53D series and TS-x51 series") released by QNAP. Issues reported included owners being rejected as an authorized user, devices reporting issues with booting, and claims of Python not being installed to run some apps and services.
Increasingly, vehicles with advanced driver assistance systems are looking not only at the road but also at the driver. And for good reason. These systems can, paradoxically, make driving less safe as drivers engage in more risky behaviors behind the wheel under the mistaken belief that electronic equipment will compensate for lack of caution.
Attempting to ward off such misuse, automakers have for years used camera-based systems to monitor the driver’s eye movement, posture, breathing, and hand placement for signs of inattention. Those metrics are compared with baseline data gathered during trips with drivers who were fully alert and focused on the road. The point is to make sure that drivers appear alert and ready to take control of the driving task if the suite of electronic sensors and actuators gets overwhelmed or misjudges a situation.
Now, several companies targeting commercial vehicle fleet operators, especially long-haul trucking companies, are introducing AI-enabled dashcam technology that takes driver monitoring a step further. These new dash cams use machine learning to pick up on the subtle behavioral cues that are signs of drowsiness. “Long-haul truckers are particularly at risk of driving drowsy because they often work long hours and drive lengthy routes,” says Evan Welbourne, Vice president for AI and Data at Samsara, which recently introduced its drowsiness detection solution.
The driver monitoring tech developed by Samsara and Motive, both based in and San Francisco, and Nauto, headquartered in nearby Sunnyvale, Calif., deliver real-time audio alerts to a drowsy driver, giving them a prompt to take a break to reduce the risk of a fatigue-related accident. All are configured so that if a dash cam detects that a driver continues to operate the vehicle while displaying signs of drowsiness after the in-cab alert, it can directly contact fleet managers so they can coach the driver and reinforce safety measures.
Each of the systems is trained to pick up on different combinations of signs that a driver is drowsy. For example, Motive’s AI, introduced in July 2024, tracks yawning and head movement. “Excessive” yawning and head posture indicating that the driver’s has taken their gaze away from the roadway for five seconds triggers an alert.
Nauto’s drowsiness detection feature, introduced in November 2021, tracks an individual driver’s behavior over time, tracking yawning and other indicators such as blink duration and frequency and changes in the driver’s overall body posture. Nauto’s AI is trained so that when these signs of drowsiness accumulate to a level associated with unacceptable risk, it issues an alert to the driver.
Samsara’s driver monitoring tech triggers an audio alert to the driver when it detects a combination of more than a dozen drowsiness symptoms, including prolonged eye closure, head nodding, yawning, rubbing eyes, and slouching, which are telltale signs that the driver is dozing off.
Improving Detectors’ Effectiveness
According to the Foundation for Traffic Safety, 17 percent of all fatal crashes involve a drowsy driver. The earliest generation of driver monitoring techaccounted for only one or two signs that a driver might be drifting off to sleep. Driver-monitoring developments such as the Percentage of Eyelid Closure Over Time (PERCLOS) methodology for measuring driver drowsiness, introduced by the U.S. National Highway Traffic Safety Administration (NHTSA) in the mid-1990s, gave system developers a direct physiological indicator to home in on. “But drowsiness is more than a single behavior, like yawning or having your eyes closed,” says Samsara’s Welbourne.
Welbourne notes that the new generation of drowsiness-detection tools are based on the Karolinska Sleepiness Scale (KSS). He explains that “KSS is a nine-point scale for making an assessment based on as many as 17 behaviors including yawning, facial contortions, and sudden jerks” that happen when they are jerking back awake after a brief interval during which they have fallen asleep. “The KSS score accounts for all of them and gives us a quantitative way to assess holistically, Is this person drowsy?”
Stefan Heck, Nauto’s CEO, says his company’s Ai is tuned to intervene at Karolinska Level 6. “We let the very early signs of drowsiness go because people find it annoying if tou alert too much. At Level 1 or 2, a person won’t be aware that they’re drowsy yet, so alerts at those levels would just come across as a nuisance.” By the time their drowsiness reaches Level 5 or 6, Heck says, they’re starting to be dangerous because they exhibit long periods of inattention. “And at that point, they know they’re drowsy, so the alert won’t come as a surprise to them.
Samsara’s Welbourne asserts that his company has good reason to be confident that its AI models are solid and will avoid false positives or false negatives that would diminish the tool’s usefulness to drivers and fleet operators. “Accurate detection is only as good as the data that feeds and trains AI models,” he notes.
With that in mind, the Samsara AI team trained a machine learning model to predict the Karolinska Sleep Score associated with a driver’s behavior using more than 180 billion minutes of video footage (depicting 220 billion miles traveled). The footage came from the dash cams in its customers’ fleet vehicles. A big challenge, Welbourne recalls, was spotting incidences of behaviors linked to drowsiness amid that mountain of data. “It’s kind of rare, so, getting enough examples to train a big model requires poring over an enormous amount of data.” Just as challenging, he says, was creating labels for all that data, “and through several iterations, coming up with a model aligned with the clinical definition of drowsiness.”
That painstaking effort has already begun to pay dividends in the short time since Samsara made the drowsiness-detection feature available in its dash cams this past October. According to Welbourne, Samsara has found that the focus on multiple signs of drowsiness was indeed a good idea. More than three-fourths of the ___ drowsy driving events [HOW MANY IN TOTAL?] to which it has been alerted by dash cams since October were detected by behaviors other than yawning alone. And he shares an anecdote about an oilfield services company that uses Samsara dash cams in its vehicles. The firm, which had previously experienced two drowsy driver events a week on average, went the entire first month after drivers started getting drowsiness alerts without any such events occurring.
To drivers concerned that the introduction of this technology foreshadows a further erosion of privacy, Samsara says that its driver-monitoring feature is intended strictly for use within commercial vehicle fleets and that it has no intention of seeking mass adoption in consumer vehicles. Maybe so, but drowsiness detection is already being incorporated as a standard safety feature in a growing number of passenger cars. Automakers such as Ford, Honda, Toyota, and Daimler-Benz have vehicles in their respective lineups that deliver audible and/or visual alert signals encouraging distracted or drowsy drivers to take a break. And it’s possible that government agencies like NHTSA will eventually mandate the technology’s use in all vehicles equipped with ADAS systems that give them Level 2 or Level 3 autonomy.
Those concerns notwithstanding, drowsiness-detection and other driver-monitoring technologies have been generally well received by fleet vehicle drivers so far. Truck drivers are mostly amenable to having dash cams aboard when they’re behind the wheel. When accidents occur, dash cams can exonerate drivers blamed for collisions they didn’t cause, saving them and freight companies a ton of money in liability claims. Now, systems capable of monitoring what’s going on inside the cab will keep the subset of drivers most likely to fall asleep at the wheel—those hauling loads at night, driving after a bout of physical exertion, or affected by an undiagnosed medical condition—from putting themselves and others in danger.
This year the IEEE Canadian Foundation established the Dr. John William Bandler Graduate Scholarship in Engineering Design in honor of the world-renowned engineer, teacher, and innovator. Bandler, an IEEE Life Fellow, died on 28 September 2023. He was known for pioneering space-mapping technology, which enables optimal, high-fidelity design of devices, circuits, and systems at a cost of only a few high-fidelity simulations.
The scholarship—funded by a donation from Bandler’s wife, Beth—provides an annual award of about US $3,550 (CAD $5,000) to a Ph.D. student or postdoctoral fellow at a Canadian university who is conducting research in electromagnetic optimization in micromillimeter- or millimeter-wave engineering, micromillimeter- or millimeter-wave imaging and inverse-scattering, engineering design optimization, or space mapping. The scholarship is to be awarded for the first time next year.
Bandler was an entrepreneur and a professor. In 1983 he founded Optimization Systems Associates in Hamilton, Ontario, to commercialize his methodology and algorithms. His award-winning research during his 50-year career revolutionized the engineering and computer-assisted design of microwave circuitry.
His practical application of space mapping, device modeling, and optimization theories led to significant reductions in the development costs of a wide variety of electronic systems.
His research was published in more than 500 publications.
Bandler served as dean of the faculty of engineering at McMaster University, also in Hamilton, and taught electrical engineering there from 1969 until his death.
“He was a trusted teacher, advisor, and friend to McMaster,” says Heather Sheardown, the university’s current dean of the faculty of engineering. “His innovations truly transformed engineering design optimization.”
A focus on simulation, optimization, and control
Bandler was born in Jerusalem during World War II, and his family moved to Nicosia, Cyprus, when he was a youngster. As a teenager, the family moved to England, where he completed high school and attended the Imperial College London, which at the time was part of the University of London. He received three engineering degrees from Imperial: a bachelor’s in 1963, a Ph.D. in 1967, and doctor of science in 1976.
After earning his Ph.D., he briefly worked at Mullard Research Laboratories, in Redhill, England, before accepting a postdoctoral fellowship at the University of Manitoba, in Winnipeg, Canada. He completed the fellowship in 1969 and joined McMaster University as an engineering professor. During his almost 55-year-long career there, he served as the 1978–1979 chair of the electrical engineering department and as dean of the faculty of engineering from 1979 to 1981.
In 1973 he established a research group to focus on simulation, optimization, and control. The group later was named the Simulation Optimization Systems Research Laboratory.
“Bandler was a trusted teacher, advisor, and friend to McMaster. His innovations truly transformed engineering design optimization.”—Heather Sheardown
It was in that lab that Bandler developed his space-mapping technology and other optimization algorithms.
To help commercialize his innovations, in 1983 he founded Optimization Systems Associates, which was sold in 1997 to Hewlett Packard Enterprise. The division later was spun off into Keysight Technologies of Santa Rosa, Calif.
He was appointed as an Order of Canada officer in 2016 for his scientific contributions, which helped position the country at the forefront of microwave engineering.
Elevating the next generation of engineers
In addition to conducting research and teaching, Bandler mentored students and young professionals. He volunteered for the IEEE MTT-S International Microwave Symposium’s Three Minute Thesis, a program that connects graduate students in engineering with mentors to help them better explain their research. At the end of the event, participants present their work in less than three minutes, using only one slide to a panel of judges who are not engineers. Starting this year, the program has been renamed the John Bandler Memorial Three Minute Thesis Competition.
In his acceptance speech for the IEEE Electromagnetics Award in 2023, Bandler spoke directly to students and young professionals and said: “Just about everything I’m known for one expert or another has discouraged me from doing. So students and young professionals, let naysayers say no. Especially if they say ‘No, go for it.’
“It took me 30 years to discover common sense hidden in plain sight, and electromagnetic optimization took off,” he said. “What are you waiting for? Your own breakthrough is staring at you.”
Blending creativity with technical expertise
Bandler was a multifaceted individual with a rich artistic background.
“One day I found myself in my mother-in-law’s studio with a paintbrush in hand and a canvas on an easel, so I started painting,” he said in a Toronto Globe and Mail interview. “Until then I didn’t even know I had an interest in art. I was strictly an engineer, an academic, and a committed entrepreneur.”
His love of painting turned into a passion for art history, writing plays, and making films. Several of his plays were performed at the Hamilton Fringe Festival and theaters in the Canadian city. Many of his plays, films, and writings can be viewed on YouTube as well as his website.
Bandler’s legacy is greater than his disruptive innovations in microwave design and optimization. His life journey encompassed art, theater, fiction, entrepreneurial activities, and academia, leaving a lasting impact on those who experienced his work and spent time with him. His ability to blend creativity with technical expertise made him a remarkable figure in both artistic and engineering circles.
To donate to—or nominate a candidate for—the Bandler Graduate Scholarship in Engineering Design, visit the IEEE Canadian Foundation website.
The TEF6686 chip can be found in a handy module [top left] that provides electromagnetic shielding and a through-hole interface. An ESP32-based development board [top middle] controls the module and performs signal processing. An LCD screen displays the user interface, which is controlled using buttons and rotary controls [bottom left]. James Provost
The display and controls are directly connected to the microcontroller using general-purpose input/output pins, while the TEF6686 receiver chip is controlled via commands sent over a serial I2C interface. The left and right channels are amplified and passed to standard RCA audio sockets.James Provost
The ASCII logo that Bootkitty is capable of rendering. Credit: ESET
Author Jesse Aronstein [at far right, in top photo] took a break from managing the equipment group of Project SWIFT to play French horn one evening a week with the Southern Dutchess Pops Orchestra. Another key manager, Walter J. “Wally” Kleinfelder [bottom left], standing at right, headed the process group of Project SWIFT. William E. “Bill” Harding [bottom right], seen here in 1973, was a brusque WW II combat veteran and creative innovator. He conceived and directed IBM’s Project SWIFT, which succeeded in fabricating integrated circuits in one day.Clockwise from top: IBM/Computer History Museum; IBM (2)
Project SWIFT occupied a small space, shown here in yellow, in building 310 at IBM’s sprawling East Fishkill semiconductor facility. IBM
Inside a sector’s enclosed chamber, a wafer went through a series of entirely automated processing steps. Two of the early concept sketches are represented here. The wafers came into the upper chamber with a pattern exposed onto the resist and underwent a series of processing steps that included development, hardening, etching, and others, as indicated.
